18 Layer PCB Stackup, materials, thickness & design reference
An engineer-built reference for high-layer-count rigid boards. Explore real 16 and 18 layer stackups, watch how core, prepreg, copper weight and thickness add up, and pressure-test impedance and cost before you release to fab — see the full 18 Layer PCB capability at PCBSync.
Explore a 16 & 18 layer stackup
Flip between layer counts and laminate families to see exactly how the cross-section is composed — copper layers, cores and prepreg — and how every dielectric and copper foil adds to the finished board thickness. Hover any layer to inspect it.
Estimate impedance & complexity
Two first-order tools for early planning: a controlled-impedance estimator and a relative cost and complexity index. Use them to sanity-check a stackup before committing — then confirm with a field solver and a fabricator review.
Controlled-impedance estimator
IPC-2141 first-order model for single-ended microstrip and stripline traces.
Cost & complexity estimator
A weighted, indicative index of how hard a board is to build — and what is driving it.
Core, prepreg & laminate materials
The dielectric you choose sets loss, impedance stability and thermal headroom across 16 and 18 layer stacks. A core is cured laminate clad with copper on both faces; prepreg (PP) is the uncured sheet that bonds the stack during lamination. Dk and Df below are typical, mid-frequency values.
| Material class | Dk (εr) | Df (loss) | Tg | Rel. cost | Where it fits |
|---|---|---|---|---|---|
| FR-4 (standard) | 4.5 | 0.020 | ~140 °C | ●●●●● | Budget-driven low/mid-speed 16–18 layer boards. |
| High-Tg FR-4 | 4.3 | 0.018 | ~170 °C | ●●●●● | Default for thick multilayers — survives lamination & assembly heat. |
| Mid-loss laminate | 3.7 | 0.008 | ~200 °C | ●●●●● | Megtron-4 / I-Speed class — multi-Gbps digital where FR-4 loss bites. |
| Low-loss / RF | 3.3 | 0.0037 | ~200 °C | ●●●●● | Megtron-7 / Rogers class — 28 GHz+ RF, 56G+ SerDes, tight Dk control. |
16 & 18 layer design tips
The differences that separate a clean fabrication from a yield problem on high-layer-count boards.
Keep the stackup balanced
Mirror copper distribution and dielectric thicknesses about the centre line. An unbalanced stack warps and bows during lamination and reflow.
Give every signal a plane
Place a solid ground or power plane adjacent to each routing layer so return current has a tight, continuous path. This is the main reason layer counts climb to 18.
Watch the aspect ratio
Aspect ratio = board thickness ÷ drill diameter. Keep through-vias ≤10:1 for standard plating; thicker 18 layer boards push small drills past that into advanced processes.
Lock impedance early
Set trace width, dielectric height and Dk per layer up front. Tell your fabricator the targets so they can tune prepreg thickness and etch compensation.
Plan sequential builds
Blind and buried vias mean multiple lamination cycles. Define which layer pairs laminate together, in what order, before routing — it changes the via map.
Balance copper per layer
Even out copper coverage layer to layer and add thieving where planes are sparse. Big copper imbalances cause resin starvation and uneven pressing.
How an 18 layer PCB is built
The sequence below is the backbone of a multilayer build. Each added layer pair and via type multiplies imaging, lamination and drilling steps — which is why complexity and cost rise so quickly.
Inner-layer image
Print & etch the circuit on each copper-clad core.
AOI & oxide
Optical inspection, then oxide treatment for bond strength.
Lay-up
Stack cores and prepreg in the defined order with foil outers.
Lamination
Heat & pressure cure the prepreg into one solid panel.
Drilling
Mechanical and laser drilling for through, buried & microvias.
Desmear & PTH
Clean holes, then deposit copper to plate the barrels.
Outer image & plate
Pattern outer layers, electroplate copper and tin resist.
Soldermask
Apply and cure the green mask; print silkscreen legend.
Surface finish
ENIG, immersion or HASL on exposed pads.
Profile & E-test
Route the outline, then electrically test every net.
Where 16 & 18 layer boards are used
High layer counts appear wherever dense routing, many reference planes and signal integrity matter at once.
Data center & AI
Accelerator cards, switch fabrics and high-speed memory interfaces.
Networking backplanes
Routers, switches and line cards with many SerDes lanes.
5G & telecom RF
Base-station radios and mixed RF/digital front-ends.
Aerospace & defense
Avionics and radar with strict reliability and IPC Class 3.
Medical imaging
Ultrasound, CT and MRI front-ends needing clean signals.
Test & measurement
Oscilloscopes and instruments with wide-band analog paths.
Industrial control
High-reliability controllers in harsh environments.
High-speed compute
Server and storage boards with tight PDN requirements.
18 layer PCB questions
How thick is an 18 layer PCB?+
What is the difference between core and prepreg?+
How many cores are in a 16 or 18 layer stackup?+
Which materials suit a high-speed 18 layer PCB?+
What drives the cost of an 18 layer PCB?+
When do you need 18 layers instead of 16?+
Ready to build your 18 layer PCB?
Take your stackup from estimate to fabrication. PCBSync handles high-layer-count, controlled-impedance and HDI builds with DFM review and full IPC test.
Explore 18 Layer PCB at PCBSync →